This invention pertains to methods for forming thin dielectric films. More specifically, the invention pertains to methods of depositing a conformal film of dielectric material on a semiconductor device with a high degree of surface smoothness particularly suited to high aspect ratio gap fill applications.
Conformal, uniform dielectric films have many applications in semiconductor manufacturing. In the fabrication of sub-micron integrated circuits (ICs) several layers of dielectric film are deposited. Four such layers are shallow trench isolation (STI), premetal dielectric (PMD), inter-metal dielectric (IMD) and interlayer dielectric (ILD). All four of these layers require silicon dioxide films that fill features of various sizes and have uniform film thicknesses across the wafer.
Chemical vapor deposition (CVD) has traditionally been the method of choice for depositing conformal silicon dioxide films. However, as design rules continue to shrink, the aspect ratios (depth to width) of features increase, and traditional CVD techniques can no longer provide adequately conformal films in these high aspect ratio features.
An alternative to CVD is atomic layer deposition (ALD). ALD methods involve self-limiting adsorption of reactant gases and can provide thin, conformal dielectric films within high aspect ratio features. An ALD-based dielectric deposition technique typically involves adsorbing a metal containing precursor onto the substrate surface, then, in a second procedure, introducing a silicon oxide precursor gas. The silicon oxide precursor gas reacts with the adsorbed metal precursor to form a thin film of metal doped silicon oxide. One drawback, however, to ALD is that the deposition rates are very low. Films produced by ALD are also very thin (i.e., about one monolayer); therefore, numerous ALD cycles must be repeated to adequately fill a gap feature. These processes are unacceptably slow in some applications in the manufacturing environment.
A related technique, referred to as rapid surface-catalyzed vapor deposition (RVD) processing, sometimes also referred to as Pulsed Deposition Layer processing (PDL), is another alternative. RVD is similar to ALD in that reactant gases are introduced alternately over the substrate surface, but in RVD the silicon oxide film can grow more thickly due to the use of a particular class of transition metal containing precursors that catalyze the reaction.
Thus, RVD methods allow for rapid film growth similar to using CVD methods but with the film conformality of ALD methods.
In the previously mentioned dielectric film applications, many of the critical features are filled after just three or four RVD cycles (each depositing approximately 150 Å), so it becomes critically important that the first of these cycles deposit a uniformly thin and smooth film. However, the first cycle is often rough and non-uniform due to poor nucleation on the substrate. For a discussion of this difficulty, see Hausmann, D., Gordon, R (2002), Surface Morphology and Crystallinity Control in the Atomic Layer Deposition (ALD) of Hafnium and Zirconium Oxide Thin Films, Journal of Crystal Growth, 249, 251–261, which is incorporated by reference herein for all purposes. Poor nucleation can dramatically increase surface roughness.
The conformal nature of the process results in the formation of seams in gap fill applications. Upon anneal and film densification, seams will expand and may result in voids forming into the dielectric layer. Film roughness is one of the factors contributing to the formation of seams. What is therefore needed are improved methods for producing silica films with greatly reduced surface roughness using RVD or ALD techniques to improve the gap fill performance of these processes.